The present invention relates in general to analog-to-digital converters, and more particularly to converters adapted for processing single ended and differential input signals.
Although a substantial portion of signal processing is carried out with digital circuits, there are many applications that require the generation and a processing of analog signals. When mixed signal processing is involved, it is a common practice to convert the analog signals to corresponding digital signals for processing by a microprocessor, or the like. Indeed, many microprocessor chips are commercially available with on-board analog-to-digital converters (ADC""s). The particular type of analog signals themselves utilized may require different types of conversion circuits and techniques. For example, various circuits generate analog signals on a single conductor, referenced with respect to ground. This type of signal is known as xe2x80x9csingle endedxe2x80x9d, meaning that the magnitude of the signal is measured with respect to a known reference voltage, such as ground. Other circuits generate differential analog signals on a pair of conductors. One analog signal on one conductor is measured with respect to the other conductor, and not with respect to a circuit ground. Such type of signals can be generated by transformers, differential output amplifiers as well as many other circuits.
The design and construction of an ADC for converting signal-ended signals is less complex than that of ADC devices for converting differential signals. It is not uncommon for a differential ADC to include two main capacitor arrays, two sets of analog switches, a differential comparator and successive-approximation logic. There are also many situations in which single-ended and differential signals are available, and it would be desirable to employ a single ADC for processing both types of signals.
From the foregoing, it can be seen that a need exists for an analog-to-digital converter that can process both single-ended and differential analog signals. Another need exists for an ADC that is efficient in design, and does not require duplicated circuits for processing differential-type analog signals. Yet another need exists for an ADC design that can be configured to convert both differential and single-ended analog signals without compromising the dynamic range of the ADC device. It would also be desirable to provide an ADC device that includes a comparator that can be configured as a high gain operational amplifier, and can be operated with a lower gain so that the comparator operates at a high speed. Another need exists for utilizing plural low gain stages to provide an overall high gain and high speed operation. Another need exists for an improved ADC that provides an efficient programmable gain circuit.
In accordance with the principles and concepts of the invention, there is disclosed an analog-to-digital converter for processing both single-ended and differential type of analog signals. The disclosed embodiment of the ADC can process both types of analog signals without compromising the dynamic range of the converter.
In accordance with the disclosed embodiment of the invention, a single digital-to-analog converter is employed with the ADC to process both differential and single-ended signals. The capacitor inputs to a high speed comparator can be switched to store a sample of a differential input signal, and then switched so as to be placed in series, and then combined with a SAR-generated analog reference. The series-connected input capacitors can share the sampled charge of the +/xe2x88x92 full scale differential signals and utilize the full dynamic range of the ADC device. When configured for single-ended operation, only one input capacitor is utilized with the full scale single-ended analog voltage to utilize the full dynamic range of the ADC device.
An operational amplifier is utilized in the disclosed ADC device, and configured as a high precision unity gain amplifier with a very high open-loop gain to sample the analog input voltage on the input capacitors, and reconfigured to provide an open loop, moderate gain comparator to provide a high speed and high resolution of whether the input analog voltage(s) is greater or less than the SAR-generated analog reference. To provide even higher gain comparator operation, plural moderate-gain amplifiers provide additional high speed amplification to the comparator output.
In another embodiment, programmable gain can be provided in the ADC device by utilizing different-valued capacitors switched in parallel with capacitors driven by the digital-to-analog converter. By employing charge-sharing between the input capacitors and the programmable gain capacitors, an effective change in the gain of the ADC can be realized.